Energy-Efficient Computer Architectures

A project at Computer Engineering, Chalmers: High-Performance Computer Architecture Group

Contents:

o Project description
o Project members
o Publications
o Collaborations
o Funding
o Open positions

Project Description

The increased power consumption in general-purpose high-performance computers has become a major concern. Particularly in order to support advanced multimedia services in future mobile computing platforms, such as personal digital assistants (PDAs), high performance levels are required but with very low power consumption.

The focus of this project is to investigate design principles for a general-purpose computing node, called mobile jelly bean, that will reflect the application needs of future mobile multimedia terminals. Our base for the investigation is memory chips on which processors are tightly integrated, called IRAMs. We will particularly address architectural approaches to manage the memory hierarchy in an energy-efficient way and also energy efficiency of the processor cores in the context of typical multimedia applications such as speech recognition, computer graphics, and video and sound compression algorithms.

As a base for our investigations, we will develop a novel experimental methodology that makes it possible to compare performance and energy-efficiency of architectural design alternatives quantitatively. Our approach is to use complete system simulation to translate execution events into power consumption. We will then quantitatively study various design alternatives by driving our simulation system with application suites that we anticipate will reflect the usage of future PDAs. Discussions are underway with a number of companies to form a solid base for collaborations. A grant application for this project was recently submitted to SSF.

Project members

Publications

Jonas Jalminger and Per Stenström: ``Improvement of Energy-Efficiency in Off-Chip Caches by Selective Prefetching'' Technical Report TR-00-15L, July 2000. (Gziped Postscript)
(Appeared in Microprocessors and Microsystems, April 6, 2002)

Jonas Jalminger and Per Stenström: ``A Novel Approach to Cache Block Reuse Predictions''
Technical Report TR-01-19L, Nov. 2001. (Postscript or Pdf)

Collaborations

The project has active collaborations with groups at the following companies or research institutes:

Funding

The project is funded by