Fredrik Dahlgren, Jonas Skeppstedt, and Per Stenström: ``An Evaluation of Hardware-Based and Compiler-Controlled Snooping Cache Protocol Extensions,'' in Future Generation Computer Systems, 13(6), pp.469-487, May 1998.

1997

Per Stenström, E. Hagersten, D. Lilja, M. Martonosi, and M. Venogupal: "Trends in Shared-Memory Multiprocessing", in IEEE Computer , Vol. 30, No. 12, pp. 44-50, December 1997.

Per Stenström, Mats Brorsson, Fredrik Dahlgren, Håkan Grahn, and Michel Dubois: ``Boosting Multiprocessor Program Performance using Optimized Cache Coherence Protocols,'' in IEEE Computer Magazine, Vol. 30, No. 7, pp. 63-70, July 1997.

F. Dahlgren, M. Björkman and P. Stenström: Reducing the Read Miss Penalty for Flat COMA Protocols, in Computer Journal , Vol. 40, No. 4, pp. 208-219, 1997.

M. Karlsson and P. Stenström: "Effectiveness of Dynamic Prefetching in Multiple-Writer Distributed Virtual Shared Memory Systems," in Journal of Parallel and Distributed Computing, Vol. 43, No. 2, pp. 79--93, 1997.

1996

Per Stenström and Fredrik Dahlgren: "Applications for Shared-Memory Multiprocessors", Guest Editors' Introduction in IEEE Computer , 29(12), pp. 29-31, December 1996.

Håkan Grahn and Per Stenström: "Evaluation of a Competitive-Update Cache Coherence Protocol with Migratory Data Detection," in Journal of Parallel and Distributed Computing, 39(2):168-180, December 1996.

Per Stenström, Magnus Balldin, and Jonas Skeppstedt: "The Design of a Non-Blocking Load Processor Architecture," Microprocessors and Microsystems, No 20, pp. 111-123, 1996.

J. Skeppstedt and P. Stenström: "Using Dataflow Analysis to Reduce Overhead in Cache Coherence Protocols," in ACM Transactions on Programming Languages and Systems, Vol 18, No 6, pp. 659-682, November 1996.

M. Brorsson and P. Stenström: "Characterising and Modelling Shared-Memory Accesses in Multiprocessor Programs," in Parallel Computing , No 22, pp. 869-893, 1996.

Fredrik Dahlgren and Per Stenström: ``Evaluation of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors,'' in IEEE Transactions on Parallel and Distributed Systems, Vol. 7, No. 4, pp. 385-398, April 1996. (Paper size: A4, USletter.)

1995

Michel Dubois, Jonas Skeppstedt and Per Stenstrom: `` Essential Misses and Memory Traffic in Coherence Protocols,''in in Journal of Parallel and Distributed Computing, Vol. 29, No 2, pp. 108-125, October 1995.

Fredrik Dahlgren, Michel Dubois, and Per Stenström: ``Sequential Hardware Prefetching in Shared-Memory Multiprocessors,'' in IEEE Transactions on Parallel and Distributed Systems, Vol. 6, No. 7, pp. 733-746, July 1995. (Paper size: A4, USletter.)

Håkan Grahn, Per Stenström, and Michel Dubois: ``Implementation and Evaluation of Update-Based Cache Protocols Under Relaxed Memory Consistency Models'', in Future Generation Computer Systems, 11(3):247-271, June 1995

Fredrik Dahlgren and Per Stenström: ``Using Write Caches to Improve Performance of Cache Coherence Protocols in Shared-Memory Multiprocessors,'' in Journal of Parallel and Distributed Computing, Vol. 26, No. 2, pp. 193-210, April 1995. (Paper size: A4, USletter.)

Conferences (refereed):

2001

Björn Andersson, Sanjoy Baruah and Jan Jonsson: ``Static-Priority Scheduling on Multiprocessors,'' in Proceedings of the IEEE Real-Time Systems Symposium, December 2001. (Available here)

Cecilia Ekelin and Jan Jonsson: ``Evaluation of Search Heuristics for Embedded Systems Scheduling,'' in Proceedings of the Int'l Conf. on Principles and Practice of Constraint Programming, November 2001. (Available here)

Fredrik Warg and Per Stenström: "Limits on Speculative Module-level Parallelism in Imperative and Object-oriented Programs on CMP Platforms," in Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT '2001), pages 221-230, September 2001. (abstract + full text)

2000

Björn Andersson and Jan Jonsson: ``Fixed-Priority Preemptive Multiprocessor Scheduling: To Partition or not to Partition,'' in Proceedings of the IEEE International Conference on Real-Time Computing Systems and Applications, December 2000. (Available here)

Björn Andersson and Jan Jonsson: ``Some Insights on Fixed-Priority Preemptive Non-Partitioned Multiprocessor Scheduling,'' in Proceedings of the IEEE Real-Time Systems Symposium -- Work-in-Progress Session, November 2000. (Available here)

Jim Nilsson and Fredrik Dahlgren, ``Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors,'' To appear in Proceedings of the 2000 International Parallel and Distributed Computing Symposium, May 2000. (PDF).

Martin Kämpe and Fredrik Dahlgren, ``Exploration of the Spatial Locality on Emerging Applications and the Consequences for Cache Performance,'' To appear in Proceedings of the 2000 International Parallel and Distributed Computing Symposium, May 2000. (PDF).

Magnus Karlsson, Fredrik Dahlgren and Per Stenström: ``A Prefetching Technique for Irregular Accesses to Linked Data Structures,'' In the Proceedings of the 6th International Conference on High Performance Computer Architecture (HPCA'6), pages 206-217, January 2000. (PS).

Magnus Karlsson, Fredrik Dahlgren and Per Stenström: ``An Analytical Model of the Working-Set Sizes of Decision-Support Systems,'' To appear in the Proceedings of SIGMETRICS'2000, June 2000. (PS).

1999

Thomas Lundqvist and Per Stenström: ``A Method to Improve the Estimated Worst-Case Performance of Data Caching,'' in Proceedings of the 6th International Conference on Real-Time Computing Systems and Applications (RTCSA'99), pages 255-262, December 1999. (Available here)

Thomas Lundqvist and Per Stenström: ``Timing Anomalies in Dynamically Scheduled Microprocessors,'' in Proceedings of 20th IEEE Real-Time Systems Symposium (RTSS'99), pages 12-21, December 1999. (Available here)

Ulf Assarsson and Tomas Möller, ``Optimized View Frustum Culling Algorithms'', Submitted for publication, March 1999. (PS).

Cecilia Ekelin and Jan Jonsson: ``Real-Time System Constraints: Where do They Come From and Where do They Go?,'' In Proceedings of the Int'l Workshop on Real-Time Constraints, October 1999. (Available here)

Jim Nilsson and Fredrik Dahlgren, ``Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors,'' in Proceedings of the 1999 International Conference on Parallel Processing, pages 246-255, September 1999. (PDF).

Jan Jonsson: ``Effective Complexity Reduction for Optimal Scheduling of Distributed Real-Time Applications,'' in Proceedings of the IEEE Int'l Conf. on Distributed Computing Systems, May/June 1999. (Available here)

Ashley Saulsbury, Su-Jaen Huang, and Fredrik Dahlgren, ``Efficient Management of DRAM Memory Hierarchies in Embedded DRAM Systems,'' in Proc. of the ACM International Conference on Supercomputing, June 1999. (Postscript: A4, USletter PDF: A4, USletter)

Jan Jonsson, Henrik Lönn and Kang G. Shin: ``Non-Preemptive Scheduling of Real-Time threads on Multi-Level-Context Architectures,'' in Proceedings of the IEEE Workshop on Parallel and Distributed Real-Time Systems, April 1999. (Available here)

Jan Jonsson: ``A Robust Adaptive Metric for Deadline Assignment in Heterogeneous Distributed Real-Time Systems,'' in Proceedings of the IEEE Int'l Parallel Processing Symposium, April 1999. (Available here)

1998

Jan Jonsson: ``GAST: A Flexible and Extensible Tool for Evaluating Multiprocessor Assignment and Scheduling Techniques,'' in Proceedings of the Int'l Conf. on Parallel Processing, August 1998. (Available here)

Thomas Lundqvist and Per Stenström: ``Integrating Path and Timing Analysis using Instruction-Level Simulation Techniques,'' in Proceedings of ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems, pages 1-15, June 1998. (Available here)

Peter Magnusson, Fredrik Dahlgren, Håkan Grahn, Magnus Karlsson, Fredrik Larsson, Fredrik Lundholm, Andreas Moestedt, Jim Nilsson, and Per Stenström: ``SimICS/sun4m: A Virtual Workstation,'' in Proceedings of the 1998 USENIX Annual Technical Conference, pages 119-130, June 1998.

Jim Nilsson, Fredrik Dahlgren, Magnus Karlsson, Peter Magnusson, and Per Stenström: ``Computer System Evaluation with Commercial Workloads,'' in Proceedings of the 1998 IASTED Conference on Modelling and Simulation, pp. 293-297, May 1998. (Postscript: A4, USletter PDF: A4, USletter)

Fred Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, and Anant Agarwal: ``The Sensitivity of Communication Mechanisms to Bandwidth and Latency'', in Proc of the 4th International Symposium on High-Performance Computer Architecture, February 1998.

1997

Jan Jonsson: ``Exploring the Importance of Preprocessing Operations in Real-Time Multiprocessor Scheduling,'' in Proceedings of the IEEE Real-Time Systems Symposium -- Work-in-Progress Session, pp. 31-34, December 1997. (Available here)

Jan Jonsson and Kang G. Shin: ``A Parametrized Branch-and-Bound Strategy for Scheduling Precedence-Constrained Tasks on a Multiprocessor System,'' in Proceedings of the Int'l Conf. on Parallel Processing, pp. 158-165, August 1997. (Available here)

Per Stenström and Jonas Skeppstedt: "A Performance Tuning Approach for Shared-Memory Multiprocessors", in Proceedings of EUROPAR'97, pp. 72-84, August 1997. Invited paper.

Jan Jonsson and Kang G. Shin: ``Deadline Assignment in Distributed Hard Real-Time Systems with Relaxed Locality Constraints,'' in Proceedings of the IEEE Int'l Conf. on Distributed Computing Systems, pp. 432-440, May 1997. (Available here)

Håkan Grahn and Per Stenström: "Relative Performance of Software-Only and Hardware-Only Directory Protocols Under Latency Tolerating Techniques", in Proceedings of the 11th International Parallel Processing Symposium , pp. 500-506, April 1997.

Fredrik Dahlgren and Anders Landin: ``Reducing the Replacement Overhead in Bus-Based COMA Multiprocessors'', in Proc of the 3rd International Symposium on High-Performance Computer Architecture, February 1997. (Paper size: USletter, uncompressed USletter, uncompressed conference slides.)

1996

Anders Landin and Fredrik Dahlgren: ``Bus-Based COMA - Reducing Traffic in Shared-Bus Multiprocessors'', in Proc of the 2nd International Symposium on High-Performance Computer Architecture, pp. 95-105, February 1996. (Paper size: USletter, uncompressed USletter.)

Magnus Karlsson and Per Stenström: ``Performance Evaluation of a Cluster-Based Multiprocessor Built from ATM Switches and Bus-Based Multiprocessor Servers," in Proc of the 2nd International Symposium on High-Performance Computer Architecture, February 1996. pp. 4-13. (Paper size: A4, USletter).

1995

Fredrik Dahlgren, Jonas Skeppstedt, and Per Stenström: ``Effectiveness of Hardware-Based and Compiler-Controlled Snooping Cache Protocol Extensions'', in Proc of the International Conference on High Performance Computing, pp. 87-92, December 1995. (Paper size: A4, USletter, uncompressed USletter.)

Fredrik Dahlgren: ``Boosting the Performance of Hybrid Snooping Cache Protocols'', in Proc of the 22nd Annual International Symposium on Computer Architecture, pp. 60-69, June 1995. (Paper size: A4, USletter, uncompressed USletter.) Jonas Skeppstedt and Per Stenstrom: `` A Compiler Algorithm that Reduces Read Latency in Ownership-Based Cache Coherence Protocols'', in Proceedings of the International Conference on Parallel Architectures and Compilation Techniques 1995, pp. 69-78, June 1995.

Håkan Grahn and Per Stenstrom: ``Efficient Strategies for Software-Only Directory Protocols in Shared-Memory Multiprocessors'', in Proceedings of the 22nd Annual International Symposium on Computer Architecture, pp. 38-47, June 1995.

Fredrik Dahlgren and Per Stenström: ``Effectiveness of Hardware-based Stride and Sequential Prefetching in Shared-Memory Multiprocessors'', in Proc of the 1st International Symposium on High-Performance Computer Architecture, pp. 68-77, January 1995. (Paper size: A4, USletter, uncompressed USletter.)

Mårten Björklund, Fredrik Dahlgren, and Per Stenström: ``Using Hints to Reduce the Read Miss Penalty for Flat COMA Protocols'', in Proc of the 28th Hawaii International Conference on System Sciences, pp. 242-251, January 1995. (Paper size: A4, USletter, uncompressed USletter.)

1994

Fredrik Dahlgren and Per Stenström: ``Reducing the Write Traffic for a Hybrid Cache Protocol'', in Proc of the 1994 International Conference on Parallel Processing, Vol 1, pp. 166-173, August 1994. (Paper size: A4, USletter, uncompressed USletter.)

Fredrik Dahlgren, Michel Dubois, and Per Stenström: ``Combined Performance Gains of Simple Cache Protocol Extensions'', in Proc of the 21st Annual International Symposium on Computer Architecture, pp. 187-197, April 1994. (Paper size: A4, USletter, uncompressed USletter.)

Mats Brorsson and Per Stenstrom, Modelling Accesses to Migratory and Producer-Consumer Characterised Data in a Shared-Memory Multiprocessor, In Proceedings of the 6th IEEE Symposium on Parallel and Distributed Processing, pp 612-619, October 1994, Dallas, TX.

Mats Brorsson and Per Stenstrom, Modelling Accesses to Stationary Data in a Shared Memory Multiprocessor, In Proceedings of the 7th International Conference on Parallel and Distributed Computing Systems, pp 802-807, October 1994, Las Vegas, NV.

Jonas Skeppstedt and Per Stenstrom: ``Simple Compiler Algorithms to Reduce Ownership Overhead in Cache Coherence Protocols'', In proceedings of The Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, October 1994.

1993

Fredrik Dahlgren, Michel Dubois, and Per Stenström: ``Fixed and Adaptive Sequential Prefetching in Shared-Memory Multiprocessors'', in Proc of the 1993 International Conference on Parallel Processing, Vol 1, pp. 56-63, August 1993. (Paper size: A4, USletter, uncompressed USletter.)

Mats Brorsson, Fredrik Dahlgren, Håkan Nilsson, and Per Stenström: ``The CacheMire Test Bench - A Flexible and Effective Approach for Simulation of Multiprocessors'', in Proc of 26th Annual Simulation Symposium, pp. 41-49, March 1993.

1992

Fredrik Dahlgren and Per Stenström: ``Reducing Write Latencies for Shared Data in a Multiprocessor with a Multistage Network'', in Proc of the 25th Hawaii International Conference on System Sciences, Vol 1, pp. 449-456, January 1992.

1991

Fredrik Dahlgren and Per Stenström: ``On Reconfigurable On-chip Data Caches'', in Proc of 24th ACM/IEEE International Symposium on Microarchitecture, pp. 189-198, November 1991.

Per Stenström, Fredrik Dahlgren, and Lars Lundberg: ``A Lockup-free Multiprocessor Cache Design'', in Proc of the 1991 International Conference on Parallel Processing, Vol 1, pp.246-250, August 1991.

Fredrik Dahlgren: ``A Program-Driven Simulation Model of an MIMD Multiprocessor'', in Proc of the 24th Annual Simulation Symposium, pp. 40-49, April 1991.